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viterbi
- VHDL 程序，实现vertibe的编码和解码。
viterbi
- 一个完整的viterbi编码程序，使用vhdl语言编写，还有测试程序
GMSK
- GMSK信号的非相干解调技术研究，包括Viterbi算法解调-Non-coherent GMSK signal demodulation techniques, including the Viterbi algorithm for demodulation
urn_nbn_se_liu_diva-6949-1__fulltext
- Viterbi decoder algorithm
topmodule3_comments
- it is a 1/2 k=3 viterbi deocder code written in VHDL.
VB_decode
- Viterbi译码的VHDL代码，并且附有详细说明-Viterbi decoding of the VHDL code, and accompanied by a detailed descr iption
viterbi5
- implemented viterbi in vhdl
FULLTEXT01
- viterbi thesis. it contains how to design viterbi decoding algorithm with matlab and vhdl code for g[171,133]
reinformationregardingapplicationfee
- paper format that includes Viterbi Decoder complete VHDL code for the document. Nh format paper format that include s Viterbi Decoder complete VHDL code for the document. Nh format paper format that includes Viterbi Decoder complete VHDL code for the
viterbi_binary_hard_c
- vhdl code for viterbi decoder
job217
- 实现（2，1，7）卷积编码以及相应的viterbi译码-(2,1,7) convolutional code and the corresponding Viterbi decoding
viterbi213
- 编码方式为213的Viterbi卷积码编码器和译码器的FPGA的实现，包含整个QuartusＩＩ的工程文件，解码方式为寄存器交换法-Encoding for the 213 convolutional code encoder and Viterbi decoder FPGA realization of the project file that contains the entire QuartusII, decoding method for the register exchange
viterbidecoder
- 移动通信系统中维特比译码器的硬件实现!j基于FPGA的有关编程代码-viterbi
xiandaiyidongtongxin
- 介绍了目前在数字无线通信中常用的一种向前纠错编码卷积码编码和Viterbi解码的原 理，并采用TOP—DOWN的设计思想，利用相关的EDA工具软件进行设计。并将卷积码编码器、Viterbi译码器设计下载到Ahera公司的FPGA芯片上进行仿真，得到了预期的设计结果。-Viterbi
viterbi
- This a code generator for some kinds of viterbi decoders. It can generate the synthesiable verilog HDL codes. These have been verified under simulation. The generator itself is released under GPL license but the Verilog HDL codes generated by it is w
vertibi
- (2,1,7)viterbi convolutional code encoding, decoding, debugging through, you can directly use